Pankaj Garg – Coreic Technologies
View Detailed Executive Profile →Professional Overview
- Pankaj Garg co-founded CoreIC Technologies Pvt Ltd in March 2024, taking on the role of Founder & CEO, responsible for steering the company's vision and strategic direction in the semiconductor industry.
- Prior to establishing CoreIC Technologies, Pankaj Garg held significant positions at UST as the Practice & Delivery head for Pre-silicon from January 2022 until March 2024, where expertise was applied to enhance pre-silicon verification processes.
- From July 2018 to January 2022, Pankaj served as the Director of Design Verification at SeviTech Systems Pvt. Ltd., contributing to the development and execution of verification strategies.
- Pankaj also held the title of Director of Hardware Engineering at Mirafra Technologies from January 2018 to June 2018, overseeing engineering teams and project deliverables.
- At Mirafra Technologies, Pankaj previously worked as a Senior Manager from April 2017 to December 2017, where responsibilities included managing verification teams and enhancing operational efficiencies.
- Pankaj initially contributed as a Verification Manager at Mirafra Technologies from April 2014 to March 2017, cultivating robust verification methodologies within the organization.
- From May 2010 to November 2011, Pankaj was employed at Transwitch as an SMTS, providing significant contributions to the design and verification processes.
- Pankaj began a career in design verification as a Design Verification Engineer at Whizchip Design Technologies Pvt Ltd from January 2009 to April 2010, engaging in various critical verification projects.
- Prior to Whizchip, Pankaj was a VLSI verification engineer at Amicus Wireless from December 2007 to January 2009, gaining foundational experience in the verification of VLSI designs.
- Pankaj's journey commenced at Chip Integration Technologies Ltd as a Verification Engineer from August 2005 to November 2007, establishing a strong base in verification techniques and methodologies.
Professional Experience
| Company | Designation | Period |
|---|---|---|
| Transwitch | SMTS | May 2010 – Nov 2011 |
| SeviTech Systems Pvt. Ltd. | Director - Design Verification | Jul 2018 – Jan 2022 |
| UST | Practice & Delivery - Pre-silicon | Jan 2022 – Mar 2024 |
| Mirafra Technologies | Director Hardware Engineering | Jan 2018 – Jun 2018 |
| Whizchip Design Technologies Pvt Ltd | Design Verification Engineer | Jan 2009 – Apr 2010 |
| Amicus Wireless | VLSI verification engineer | Dec 2007 – Jan 2009 |
| Chip Integration Technologies Ltd | Verification Engineer | Aug 2005 – Nov 2007 |
| Mirafra Technologies | Senior Manager | Apr 2017 – Dec 2017 |
| Mirafra Technologies | Verification Manager | Apr 2014 – Mar 2017 |
| CoreIC Technologies Pvt Ltd | Founder & CEO | Mar 2024 – Present |
Estimated Net Worth
Estimated Range: ₹0 – ₹1000+ Cr (approx. $0 – $120M+)
Based on publicly accessible filings, industry benchmarks, and leadership compensation patterns.
Executive Contact
Official Email: Via Coreic Technologies corporate communication desk.
Personal Contact: Not publicly disclosed.
Frequently Asked Questions
What is Pankaj Garg's net worth?
Estimated ₹0 – ₹1000+ Cr (approx. $0 – $120M+).
How can I contact them?
Through Coreic Technologies's official communication channels.
Is this an official profile?
No — independently created using public data.
Disclaimer
This profile is created for general informational purposes. All details are based on publicly accessible information and independent research. While accuracy is prioritized, content may not always reflect the latest updates.
Nothing here should be interpreted as investment, financial, or legal advice. The individual featured has not authored or endorsed this profile.
Personal information is intentionally withheld. For official matters, please use formal communication channels associated with the respective organization.
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Last Updated: December 2025 · Published by Affluense AI (affluense.ai)